1 features very low start up current (300 a typ) optimized off-line control internally trimmed, temperature compensated oscillator maximum duty-cycle clamp v ref stabilization before output enable pulse-by-pulse current limiting improved undervoltage lockout double pulse suppression 1% trimmed bandgap reference high current totem pole output package options cs3842b/3843b off-line current mode pwm control circuit with very low start up current cs3842b/cs3843b description block diagram absolute maximum ratings 1 comp 2 3 4 v fb sense osc v ref v cc v out gnd 8 7 6 5 8 lead pdip & so narrow 10 7 14 13 12 8 1 2 3 4 5 6 11 9 comp nc v fb nc sense nc osc v ref nc v cc v cc pwr v out pwr gnd gnd 14l so narrow december, 2001 - rev. 4 on semiconductor 2000 south county trail, east greenwich, ri 02818 tel: (401)885?600 fax: (401)885?786 n. american technical support: 800-282-9855 web site: www.cherry?emi.com archive DEVICE not recommended for new design the cs384xb provides all the neces- sary features to implement off-line fixed frequency current-mode control with a minimum number of external components. the family has been opti- mized for very low start up current (300 a, typ). the cs384xb family incorporates a precision temperature-controlled oscil- lator with an internally trimmed dis- charge current to minimize variations in frequency. a precision duty-cycle clamp eliminates the need for an exter- nal oscillator when a 50% duty-cycle is used. duty-cycles of almost 100% are possible. on board logic ensures that v ref is stabilized before the output stage is enabled. ion-implant resistors provide tighter control of undervoltage lockout. other features include pulse-by-pulse current limiting, and a high-current totem pole output for driving capaci- tive loads, such as the gate of a power mosfet. the output is low in the off state, consistent with n-channel DEVICEs. these ics are available in 8 and 14 lead surface mount (so) and 8 lead pdip packages. supply voltage (i cc <30ma) ..........................................................self limiting supply voltage (low impedance source)...................................................30v output current ............................................................................................... 1a output energy (capacitive load) .................................................................5 j analog inputs (v fb , sense) ............................................................-0.3v to 5.5v error amp output sink current...............................................................10ma lead temperature soldering wave solder (through hole styles only) ...................10 sec. max, 260? peak reflow (smd styles only) ....................60 sec. max above 183?, 230? peak v cc gnd osc v fb comp sense v ref v out output enable 5v reference internal bias nor s r pwm latch current sense comparator oscillator 1 v r 2 r v c error amplifier + 2.50v set/ reset undervoltage lock-out circuit 34v ( ) indicates cs-3843b 16v/10v (8.4v/7.6v) v cc pwr pwr gnd ref
2 electrical characteristics: 0 t a 70?, v cc =15v (note 1); r t =680 ? , c t =.022 f for triangular mode, r t =10k ? , c t =3.3nf for sawtooth mode (see fig. 3), unless otherwise stated parameter test conditions min typ max units cs3842b/3843b reference section output voltage t j =25?, i out =1ma 4.90 5.00 5.10 v line regulation 12 v in 25v 6 20 mv load regulation 1 i out 20ma 6 25 mv temperature stability (note 2) 0.2 0.4 mv/ c total output variation line, load, temperature (note 2) 4.82 5.18 v output noise voltage 10hz f 10khz, t j =25? (note 2) 50 v long term stability t a =125?, 1khrs. (note 2) 5 25 mv output short circuit t a =25? -30 -100 -180 ma oscillator section initial accuracy sawtooth mode (see fig. 3), t j =25? 47 52 57 khz triangular mode (see fig. 3), t j =25? 44 52 60 khz voltage stability 12 v cc 25v 0.2 1.0 % temp. stability sawtooth mode t min t a t max (note 2) 5 % triangular mode t min t a t max (note 2) 8 % amplitude oscillator peak to peak 1.7 v discharge current t j =25? 7.5 8.3 9.3 ma t min t a t max 7.2 9.5 ma error amp section input voltage v comp =2.5v 2.42 2.50 2.58 v input bias current -0.3 -2.0 a a vol 2 v out 4v 65 90 db unity gain bandwidth (note 2) 0.7 1.0 mhz psrr 12 v cc 25v 60 70 db output sink current v fb =2.7v, v osc =1.1v 2 6 ma output source current v fb =2.3v, v osc =5v -0.5 -0.8 ma v out high v fb =2.3v, r l =15k ? to ground 5 6 v v out low v fb =2.7v, r l =15k ? to v ref 0.7 1.1 v current sense section gain (notes 3 & 4) 2.85 3.00 3.15 v/v maximum input signal v comp =5v (note 3) 0.9 1.0 1.1 v psrr 12 v cc 25v (note 3) 70 db input bias current -2 -10 a delay to output t j =25? (note 2) 150 300 ns output section output low level i sink =20ma 0.1 0.4 v i sink =200ma 1.5 2.2 v output high level i source =20ma 13.0 13.5 v i source =200ma 12.0 13.5 v
3 cs3842b/3843b electrical characteristics: continued parameter test conditions min typ max units cs-3842b cs-3843b parameter test conditions min typ max min typ max units notes: 1. adjust v cc above the start threshold before setting at 15v. 2. these parameters, although guaranteed, are not 100% tested in production. 3. parameter measured at trip point of latch with v fb =0. 4. gain defined as: a = ; 0 v sense 0.8v. ? v comp ? v sense package pin description package pin # pin symbol function 8l pdip/so 14l so narrow 1 1 comp error amp output, used to compensate error amplifier 23 v fb error amp inverting input 3 5 sense noninverting input to current sense comparator 4 7 osc oscillator timing network with capacitor to ground, resistor to v ref 5 8 gnd ground 9 pwr gnd output driver ground 610v out output drive pin 11 v cc pwr output driver positive supply 712v cc positive power supply 814v ref output of 5v internal reference 2,4,6,13 nc no connection output section: continued rise time t j =25?, c l =1nf (note 2) 50 150 ns fall time t j =25?, c l =1nf (note 2) 50 150 ns output leakage uvlo active, v out =0 -0.01 -10.00 a total standby current start-up current 0.3 0.5 ma operating supply current v fb =v sense =0v r t =10k ? , c t =3.3nf 11 17 ma v cc zener voltage i cc =25ma 34 v under-voltage lockout section start threshold 14.5 16.0 17.5 7.8 8.4 9.0 v min. operating after turn on 8.5 10.0 11.5 7.0 7.6 8.2 v voltage
undervoltage lockout during undervoltage lockout (figure 1), the output driv- er is biased to a high impedance state. v out should be shunted to ground with a resistor to prevent output leak- age current from activating the power switch. pwm waveform to generate the pwm waveform, the control voltage from the error amplifier is compared to a current sense signal which represents the peak output inductor current (figure 2). an increase in v cc causes the inductor current slope to increase, thus reducing the duty cycle. this is an inherent feed-forward characteristic of current mode con- trol, since the control voltage does not have to change during changes of input supply voltage. when the power supply sees a sudden large output cur- rent increase, the control voltage will increase allowing the duty cycle to momentarily increase. since the duty 4 cs3842b/3843b test circuit v ref v cc v out 1k ? 1w 0.1 f 0.1 f v ref v cc v out gnd v fb sense osc comp 5k ? 100k ? 4.7k ? 1k ? error amp adjust 4.7k ? sense adjust r t 2n2222 c t gnd a cs-3842b cs-3843b circuit description typical performance characteristics: oscillator duty cycle vs r t oscillator frequency vs c t v cc on/off command to reset of ic v on 16v 8.4v v off 10v 7.6v cs3842b cs3843b <0.5ma <15ma v on v off i cc v cc figure 1: typical undervoltage characteristics .0005 .001 .002 .003 .005 .01 .02 .03 .04 800 900 freq. (khz) c t ( f) 700 600 500 400 300 200 100 .05 r t =1.5k ? r t =680 ? r t =10k ? ? ) 70 60 50 40 30 20 10 4k 3k 500 400 300 100
figure 3: oscillator timing network and parameters v ref osc gnd r t c t v osc internal clock large r t ( 10k ? ) v ref internal clock small r t ( 700k ? ) 5 cs3842b/3843b figure 3: oscillator sawtooth mode triangular mode v upper v lower t c t d figure 2: timing diagram for key cs-384xb parameters v cc i out v out switch current ea output v osc osc reset cycle tends to exceed the maximum allowed, to prevent transformer saturation in some power supplies, the inter- nal oscillator waveform provides the maximum duty cycle clamp as programmed by the selection of oscillator timing components. setting the oscillator the oscillator timing capacitor, c t , is charged by v ref through r t and discharged by an internal current source (figure 3). during the discharge time, the internal clock signal blanks out the output to the low state, thus provid- ing a user selected maximum duty cycle clamp. charge and discharge times are determined by the general formulas: t c = r t c t ln t d = r t c t ln substituting in typical values for the parameters in the above formulas: v ref = 5.0v, v upper = 2.7v, v lower = 1.0v, i d = 8.3ma, then t c 0.5534r t c t t d = r t c t ln the frequency and maximum duty cycle can be deter- mined from the typical performance characteristics graphs. grounding high peak currents associated with capacitive loads neces- sitate careful grounding techniques. timing and bypass capacitors should be connected close to ground in a single point ground. the transistor and 5k ? potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to sense. ) 2.3 ?0.0083 r t 4.0 ?0.0083 r t ( ) v ref ?i d r t ? lower v ref ?i d r t ?v upper ( ) v ref ?v lower v ref ?v upper (
6 d lead count metric english max min max min 8 l pdip 10.16 9.02 .400 .355 8 l soic narrow 5.00 4.80 .197 .189 14l soic narrow 8.75 8.55 .344 .337 part number description cs3842bgn8 8l pdip cs3842bgd8 8l so narrow cs3842bgdr8 8l so narrow (tape & reel) cs3842bgd14 14l so narrow cs3842bgdr14 14l so narrow (tape & reel) cs3843bgn8 8l pdip cs3843bgd8 8l so narrow cs3843bgdr8 8l so narrow (tape & reel) cs3843bgd14 14l so narrow cs3843bgdr14 14l so narrow (tape & reel) thermal data 8 l 8l 14 l pdip so narrow so narrow r jc typ 52 45 30 c/w r ja typ 100 165 125 ?/w package specification package dimensions in mm (inches) ordering information package thermal data cs3842b/3843b on semiconductor and the on logo are trademarks of semiconductor components industries, llc (scillc). on semiconductor reserves the right to make changes without further notice to any products herein. for additional infor- mation and the latest available information, please contact your local on semiconductor representative. ?semiconductor components industries, llc, 2000 archive DEVICE not recommended for new design plastic dip (n); 300 mil wide 0.39 (.015) min. 2.54 (.100) bsc 1.77 (.070) 1.14 (.045) d some 8 and 16 lead packages may have 1/2 lead at the end of the package. all specs are the same. .203 (.008) .356 (.014) ref: jedec ms-001 3.68 (.145) 2.92 (.115) 8.26 (.325) 7.62 (.300) 7.11 (.280) 6.10 (.240) .356 (.014) .558 (.022) surface mount narrow body (d); 150 mil wide 1.27 (.050) bsc 0.51 (.020) 0.33 (.013) 6.20 (.244) 5.80 (.228) 4.00 (.157) 3.80 (.150) 1.57 (.062) 1.37 (.054) d 0.25 (0.10) 0.10 (.004) 1.75 (.069) max 1.27 (.050) 0.40 (.016) ref: jedec ms-012 0.25 (.010) 0.19 (.008)
notes
notes
|
